1. Field of the Invention
The present invention relates to a data detector and a multi-channel data detector for extracting required data from received data.
2. Description of the Related Art
Japanese Patent Laid-Open Publication No. 60-91739 describes a data detector. As shown in FIG. 22, this data detector includes a pattern detecting means 161, a synchronous detecting means 162, an asynchronous detecting means 163, an OR means 164, and a flip-flop 165. Input data which is applied to the pattern detecting means 161 is formed from a frame synchronization pattern and data. A frame synchronization pattern is a special pattern string which is periodically present in every frame so that data is synchronized. The pattern detecting means 161 detects whether or not a frame synchronization pattern is present in the received input data. The pattern detecting means 161 outputs a match signal if a frame synchronization pattern is present. Otherwise, the pattern detecting means 161 outputs a mismatch signal. The synchronous detecting means 162 counts the match signals from the pattern detecting means 161. The asynchronous detecting means 163 counts the mismatch signals from the pattern detecting means 161. When the match signal is output N times in a row, the synchronous detecting means 162 sets the flip-flop 165 to 1, switching the mode to a synchronous mode. At the same time, the synchronous detecting means 162 resets the respective counters of the synchronous detecting means 162 and the asynchronous detecting means 163 through the OR means 164.
When the mismatch signal is output M times in a row in the synchronous mode, the asynchronous detecting means 163 resets the flip-flop 165 to zero, switching the mode to an asynchronous mode. At the same time, the asynchronous detecting means 163 resets the respective counters of the synchronous detecting means 162 and the asynchronous detecting means 163 through the OR means 164.
When the mode is switched to the synchronous mode, data in the input data can be accurately detected based on the frame synchronization pattern. The frame synchronization pattern is present periodically. Therefore, the synchronous mode can be maintained as long as the pattern detecting means 161 detects a frame synchronization pattern after the cycle of the previous frame synchronization pattern.